Mіroshnyk M. A.; SHKIL, A. S.; KULAK, E. N.; RAKHLIS, D. Y.; Mіroshnyk A. M.; MALAHOV, N. V. DESIGN TIMED FSM WITH VHDL MOORE PATTERN. Radio Electronics, Computer Science, Control, [S. l.], n. 2, p. 137–148, 2020. DOI: 10.15588/1607-3274-2020-2-14. Disponível em: https://ric.zp.edu.ua/article/view/208496. Acesso em: 29 nov. 2024.