BARKALOV, A. A.; TITARENKO, L. A.; BABAKOV, R. M. SYNTHESIS OF VHDL-MODEL OF A FINITE STATE MACHINE WITH DATAPATH OF TRANSITIONS . Radio Electronics, Computer Science, Control, [S. l.], n. 4, p. 135, 2024. DOI: 10.15588/1607-3274-2023-4-13. Disponível em: https://ric.zp.edu.ua/article/view/296233. Acesso em: 29 nov. 2024.