Mіroshnyk M. A., A. S. Shkil, E. N. Kulak, D. Y. Rakhlis, Mіroshnyk A. M., and N. V. Malahov. “DESIGN TIMED FSM WITH VHDL MOORE PATTERN”. Radio Electronics, Computer Science, Control, no. 2 (September 8, 2020): 137–148. Accessed November 29, 2024. https://ric.zp.edu.ua/article/view/208496.