1.
Vavruk YY, Makhrov VV, Hedeon HO. THE DESIGN OF THE PIPELINED RISC-V PROCESSOR WITH THE HARDWARE COPROCESSOR OF DIGITAL SIGNAL PROCESSING. RIC [Internet]. 2024Apr.2 [cited 2024Nov.29];(1):197. Available from: https://ric.zp.edu.ua/article/view/301016